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dc.contributor.authorPérez Peña, Fernando 
dc.contributor.authorCifredo Chacón, María Ángeles 
dc.contributor.authorQuirós Olozábal, Ángel 
dc.contributor.otherIngeniería en Automática, Electrónica, Arquitectura y Redes de Computadoreses_ES
dc.date.accessioned2025-01-17T10:23:26Z
dc.date.available2025-01-17T10:23:26Z
dc.date.issued2020-01-01
dc.identifier.issn0925-2312
dc.identifier.urihttp://hdl.handle.net/10498/34500
dc.description.abstractHardware implementations of spiking neural networks in portable devices can improve many applications of robotics, neurorobotics or prosthetic fields in terms of power consumption, high-speed processing and learning mechanisms. Analog and digital platforms have been previously proposed to run these networks. Analog designs are closer to biology since they implement the original mathematical model. However, digital platforms are, to some extent, abstractions of this model so far. In this paper, a full digital platform to design, implement and run real-time analog-like spiking neural networks is presented. Specifically, we present the design and implementation of digital circuits to run real-time biologically plausible spiking neural networks on a Field Programmable Gate Array (FPGA). The circuit designed for the neuron implements the Leaky Integrate and Fire (LIF) model. The synapsis implemented is a bi-exponential current-based one. The synaptic circuit design consists of one static memory with the baseline current and a dynamic memory which stores the updated contribution over time of each pre-synaptic connection. All the parameters of both the neuron and the synapse are configurable. The results of the circuits are validated by running the same experiments on the Brian simulator. The circuits, which are totally original and independent of the technology, use only 136 slice registers of hardware resources. Thus, these designs allow the scale of the network. These circuits aim to be the basis of the spiking neural networks on digital devices. This platform allows the user to first simulate their network within the Brian simulator and then, confidently, move to the hardware platform replicating the same performance or even replace their analog platform with the digital one.es_ES
dc.formatapplication/pdfes_ES
dc.language.isoenges_ES
dc.publisherElsevieres_ES
dc.sourceNeurocomputing, Volume 371, 2020, Pages 91-99es_ES
dc.subjectSpiking neural networkes_ES
dc.subjectNeuromorphic engineeringes_ES
dc.subjectLeaky-integrate and firees_ES
dc.subjectFPGAes_ES
dc.subjectBrian simulatores_ES
dc.titleDigital neuromorphic real-time platformes_ES
dc.typejournal articlees_ES
dc.rights.accessRightsclosed accesses_ES
dc.identifier.doi10.1016/J.NEUCOM.2019.09.004
dc.type.hasVersionVoRes_ES


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